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Ata Elahi
Computer Systems
Digital Design, Fundamentals of Computer
Architecture and ARM Assembly Language
2nd ed. 2022
Ata Elahi
Southern Connecticut State University, New Haven, CT, USA
This work is subject to copyright. All rights are solely and exclusively
licensed by the Publisher, whether the whole or part of the material is
concerned, specifically the rights of translation, reprinting, reuse of
illustrations, recitation, broadcasting, reproduction on microfilms or in
any other physical way, and transmission or information storage and
retrieval, electronic adaptation, computer software, or by similar or
dissimilar methodology now known or hereafter developed.
The publisher, the authors and the editors are safe to assume that the
advice and information in this book are believed to be true and accurate
at the date of publication. Neither the publisher nor the authors or the
editors give a warranty, expressed or implied, with respect to the
material contained herein or for any errors or omissions that may have
been made. The publisher remains neutral with regard to jurisdictional
claims in published maps and institutional affiliations.
Intended Audience
This book is written primarily for a one-semester course as an
introduction to computer hardware and assembly language for
students majoring in Computer Science, Information Systems, and
Engineering Technology.
Organization
The material of this book is presented in such a way that no special
background is required to understand the topics.
Chapter 1–Signals and Number Systems: Analog Signal, Digital Signal,
Binary Numbers, Addition and Subtraction of binary numbers, IEEE
754 Floating Point representations, ASCII, Unicode, Serial
Transmission, and Parallel Transmission
Chapter 2–Boolean Logics and Logic Gates: Boolean Logics, Boolean
Algebra Theorems, Logic Gates, Integrated Circuit (IC), Boolean
Function, Truth Table of a function and using Boolean Theorems to
simplify Boolean Functions
Chapter 3–Minterms, Maxterms, Karnaugh Map (K-Map) and
Universal Gates: Minterms, Maxterms, Karnaugh Map (K-Map) to
simplify Boolean Functions, Don’t Care Conditions and Universal Gates
Chapter 4–Combinational Logic: Analysis of Combination Logic,
Design of Combinational Logic, Decoder, Encoder, Multiplexer, Half
Adder, Full Adder, Binary Adder, Binary Subtractor, Designing
Arithmetic Logic Unit (ALU), and BCD to Seven Segment Decoder
Chapter 5–Synchronous Sequential Logic: Sequential Logic such as S-
R Latch, D-Flip Flop, J-K Flip Flop, T-Flip Flop, Register, Shift Register,
Analysis of Sequential Logic, State Diagram, State Table, Flip Flop
Excitation Table, and Designing Counter
Chapter 6–Introduction to Computer Architecture: Components of a
Microcomputer, CPU Technology, CPU Architecture, Instruction
Execution, Pipelining, PCI, PCI Express, USB, and HDMI
Chapter 7–Memory: Memory including RAM, SRAM, DISK, SSD,
Memory Hierarchy, Cache Memory, Cache Memory Mapping Methods,
Virtual Memory, Page Table, and the memory organization of a
computer
Chapter 8– Assembly Language and ARM Instructions Part I: ARM
Processor Architecture, and ARM Instruction Set such as Data
Processing, Shift, Rotate, Unconditional Instructions and Conditional
Instructions, Stack Operation, Branch, Multiply Instructions, and
several examples of converting HLL to Assembly Language.
Chapter 9–ARM Assembly Language Programming Using Keil
Development Tools: Covers how to use Keil development software for
writing assembly language using ARM Instructions, Compiling
Assembly Language, and Debugging
Chapter 10–ARM Instructions Part II and Instruction Formats: This
chapter is the continuation of Chap. 8 which covers Load and Store
Instructions, Pseudo Instructions, ARM Addressing Mode, and
Instruction formats.
Chapter 11–C Bitwise and Control Structures Used for Programming
with C and ARM Assembly Language
Instruction Resources: The instruction resources contain
15 Laboratory experiments using Logisim.
Solutions to the problems of each chapter.
Power points of each chapter
Ata Elahi
New Haven, CT, USA
Acknowledgments
I would like to express my special thanks to Professor Lancor Chairman
of Computer Science Department at Southern Connecticut State
University for her support as well as Professor Herv Podnar for his
guidance.
I wish to acknowledge and thank Ms. Mary E. James, Senior Editor in
Applied Sciences and her assistant, Ms. Zoe Kennedy, for their support.
My special thanks to Eric Barbin, Alex Cushman, Marc Gajdosik,
Nickolas Santini, Nicholas Bittar, Omar Abid, and Alireza Ghods for their
help in developing the manuscript. Finally, I would like to thank the
students of CSC 207 Computer Systems of Spring 2020.
Contents
1 Signals and Number Systems
1.1 Introduction
1.1.1 CPU
1.2 Historical Development of the Computer
1.3 Hardware and Software Components of a Computer
1.4 Types of Computers
1.5 Analog Signals
1.5.1 Characteristics of an Analog Signal
1.6 Digital Signals
1.7 Number System
1.7.1 Converting from Binary to Decimal
1.7.2 Converting from Decimal Integer to Binary
1.7.3 Converting Decimal Fraction to Binary
1.7.4 Converting from Hex to Binary
1.7.5 Binary Addition
1.8 Complement and Two’s Complement
1.8.1 Subtraction of Unsigned Number Using Two’s
Complement
1.9 Unsigned, Signed Magnitude, and Signed Two’s Complement
Binary Number
1.9.1 Unsigned Number
1.9.2 Signed Magnitude Number
1.9.3 Signed Two’s Complement
1.10 Binary Addition Using Signed Two’s Complement
1.11 Floating Point Representation
1.11.1 Single and Double Precision Representations of
Floating Point
1.12 Binary-Coded Decimal (BCD)
1.13 Coding Schemes
1.13.1 ASCII Code
1.13.2 Universal Code or Unicode
1.14 Parity Bit
1.14.1 Even Parity
1.14.2 Odd Parity
1.15 Clock
1.16 Transmission Modes
1.16.1 Asynchronous Transmission
1.16.2 Synchronous Transmission
1.17 Transmission Methods
1.17.1 Serial Transmission
1.17.2 Parallel Transmission
1.18 Summary
2 Boolean Logics and Logic Gates
2.1 Introduction
2.2 Boolean Logics and Logic Gates
2.2.1 AND Logic
2.2.2 OR Logic
2.2.3 NOT Logic
2.2.4 NAND Gate
2.2.5 NOR Gate
2.2.6 Exclusive OR Gate
2.2.7 Exclusive NOR Gate
2.2.8 Tri-State Device
2.2.9 Multiple Inputs Logic Gates
2.3 Integrated Circuit (IC) Classifications
2.3.1 Small-Scale Integration (SSI)
2.3.2 Integrated Circuit Pins Numbering
2.3.3 Medium-Scale Integration (MSI)
2.3.4 Large-Scale Integration (LSI)
2.3.5 Very-Large-Scale Integration (VLSI)
2.4 Boolean Algebra Theorems
2.4.1 Distributive Theorem
2.4.2 De Morgan’s Theorem I
2.4.3 De Morgan’s Theorem II
2.4.4 Commutative Law
2.4.5 Associative Law
2.4.6 More Theorems
2.5 Boolean Function
2.5.1 Complement of a Function
2.6 Summary
Problems
3 Minterms, Maxterms, Karnaugh Map (K-Map), and Universal
Gates
3.1 Introduction
3.2 Minterms
3.2.1 Application of Minterms
3.2.2 Three-Variable Minterms
3.3 Maxterms
3.4 Karnaugh Map (K-Map)
3.4.1 Three-Variable Map
3.4.2 Four-Variable K-Map
3.5 Sum of Products (SOP) and Product of Sums (POS)
3.6 Don’t Care Conditions
3.7 Universal Gates
3.7.1 Using NAND Gates
3.7.2 Using NOR Gates
3.7.3 Implementation of Logic Functions Using NAND Gates
or NOR Gates Only
3.7.4 Using NAND Gates
3.7.5 Using NOR Gates
3.8 Summary
Problems
4 Combinational Logic
4.1 Introduction
4.2 Analysis of Combinational Logic
4.3 Design of Combinational Logic
4.3.1 Solution
4.4 Decoder
4.4.1 Implementing a Function Using a Decoder
4.5 Encoder
4.6 Multiplexer (MUX)
4.6.1 Designing Large Multiplexer Using Smaller
Multiplexers
4.6.2 Implementing Functions Using Multiplexer
4.7 Half Adder, Full Adder, Binary Adder, and Subtractor
4.7.1 Full Adder (FA)
4.7.2 4-Bit Binary Adder
4.7.3 Subtractor
4.8 ALU (Arithmetic Logic Unit)
4.9 Seven-Segment Display
4.10 Summary
Problems
5 Synchronous Sequential Logic
5.1 Introduction
5.2 S-R Latch
5.2.1 S-R Latch Operation
5.3 D Flip-Flop
5.4 J-K Flip-Flop
5.5 T Flip-Flop
5.6 Register
5.6.1 Shift Register
5.6.2 Barrel Shifter
5.7 Frequency Divider Using J-K Flip-Flop
5.8 Analysis of Sequential Logic
5.9 State Diagram
5.9.1 D Flip-Flop State Diagram
5.10 Flip-Flop Excitation Table
5.10.1 D Flip-Flop Excitation Table.
5.10.2 Excitation Table Operation
5.10.3 J-K Flip-Flop Excitation Table
5.10.4 T Flip-Flop Excitation Table
5.11 Counter
5.12 Summary
Problems
6 Introduction to Computer Architecture
6.1 Introduction
6.1.1 Abstract Representation of Computer Architecture
6.2 Components of a Microcomputer
6.2.1 Central Processing Unit (CPU)
6.2.2 CPU Buses
6.2.3 Memory
6.2.4 Serial Input/Output
6.2.5 Direct Memory Access (DMA)
6.2.6 Programmable I/O Interrupt
6.2.7 32-Bit Versus 64-Bit CPU
6.3 CPU Technology
6.3.1 CISC (Complex Instruction Set Computer)
6.3.2 RISC
6.4 CPU Architecture
6.4.1 Von Neumann Architecture
6.4.2 Harvard Architecture
6.5 Intel Microprocessor Family
6.5.1 Upward Compatibility
6.6 Multicore Processors
6.7 CPU Instruction Execution Steps
6.7.1 Pipelining
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