Description
Description:
When running the tailwind-macos-x64 binary from Tailwind >=4.0 on an iMac equipped with the 3.4Ghz Intel Core i7 quad-core CPU, the command returns an Illegal instruction: 4 error. The same binary instead works fine on a MacBook Air equipped with the 2.2 Ghz Intel Core i7 dual-core CPU.
The only significant hardware difference is that the Intel Core i7 Quad-Core CPU supports three fewer CPU instructions compared to the Intel Core i7 Dual-Core CPU.
Older Tailwind versions (<4.0) runs regularly on the older i7 CPU.
Steps to Reproduce:
- Download the tailwind-macos-x64 binary from the Tailwind 4.0.9 release (actually, any >=4.0).
- On a system with a processor lacking certain advanced instructions (e.g., an older iMac), run, for example, the following command:
$ ./tailwind-macos-x64 --help- The command returns:
Illegal instruction: 4Expected Behavior:
The binary should execute normally without producing an illegal instruction error.
Observed Behavior:
On the affected iMac, the command fails with:
Illegal instruction: 4In contrast, on a MacBook Air with a newer Intel Core i7 that supports the necessary instructions, the same binary executes as expected:
$ tailwind-macos-x64 --help
≈ tailwindcss v4.0.9
Usage:
tailwindcss [--input input.css] [--output output.css] [--watch] [options…]
Options:
-i, --input ··········· Input file
-o, --output ·········· Output file [default: `-`]
-w, --watch ··········· Watch for changes and rebuild as needed
-m, --minify ·········· Optimize and minify the output
--optimize ········ Optimize the output without minifying
--cwd ············· The current working directory [default: `.`]
-h, --help ············ Display usage informationAdditional Context:
Running sysctl -a | grep machdep.cpu.features on both machines shows that the iMac's CPU is missing three instruction sets that are present on the MacBook Air’s CPU.
# Intel Core i7 quad-core
$ sysctl -a | grep machdep.cpu.features
machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM PBE SSE3 PCLMULQDQ DTES64 MON DSCPL VMX SMX EST TM2 SSSE3 CX16 TPR PDCM SSE4.1 SSE4.2 x2APIC POPCNT AES PCID XSAVE OSXSAVE TSCTMR AVX1.0 RDRAND F16C
# Intel Core i7 dual-core
$ sysctl -a | grep machdep.cpu.features
machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM PBE SSE3 PCLMULQDQ DTES64 MON DSCPL VMX SMX EST TM2 SSSE3 FMA CX16 TPR PDCM SSE4.1 SSE4.2 x2APIC MOVBE POPCNT AES PCID XSAVE OSXSAVE SEGLIM64 TSCTMR AVX1.0 RDRAND F16C
# Differences: FMA, MOVBE, SEGLIM64
The issue does not occur with Tailwind 3.0, indicating that version 4.0 may have been compiled with optimizations that require advanced CPU instructions not available on the older processor.
Potential Solutions:
Provide a variant of the binary compiled with optimizations compatible with older processors or with fallback options for unsupported CPU instructions.
Offer a configuration option during the build process to target a wider range of CPU instruction sets.
I appreciate your attention to this issue and look forward to any guidance or solutions you can provide.
Thank you!