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Global
edition
Computer Organization
and Architecture
Designing for Performance
tenth edition
William Stallings
To Tricia
my loving wife, the kindest
and gentlest person
This page intentionally left blank.
Contents
Foreword 13
Preface 15
About the Author 23
7
8 Contents
Chapter 5 Internal Memory 189
5.1 Semiconductor Main Memory 190
5.2 Error Correction 198
5.3 DDR Dram 204
5.4 Flash Memory 209
5.5 Newer Nonvolatile Solid-State Memory Technologies 211
5.6 Key Terms, Review Questions, and Problems 214
Chapter 6 External Memory 218
6.1 Magnetic Disk 219
6.2 Raid 228
6.3 Solid State Drives 236
6.4 Optical Memory 241
6.5 Magnetic Tape 246
6.6 Key Terms, Review Questions, and Problems 248
Chapter 7 Input/Output 252
7.1 External Devices 254
7.2 I/O Modules 256
7.3 Programmed I/O 259
7.4 Interrupt-Driven I/O 263
7.5 Direct Memory Access 272
7.6 Direct Cache Access 278
7.7 I/O Channels and Processors 285
7.8 External Interconnection Standards 287
7.9 IBM zEnterprise EC12 I/O Structure 290
7.10 Key Terms, Review Questions, and Problems 294
Chapter 8 Operating System Support 299
8.1 Operating System Overview 300
8.2 Scheduling 311
8.3 Memory Management 317
8.4 Intel x86 Memory Management 328
8.5 Arm Memory Management 333
8.6 Key Terms, Review Questions, and Problems 338
References 824
Index 833
Credits 857
Online Appendices1
1
Online chapters, appendices, and other documents are Premium Content, available via the access card
at the front of this book.
This page intentionally left blank.
Foreword
by Chris Jesshope
Professor (emeritus) University of Amsterdam
Author of Parallel Computers (with R W Hockney), 1981 & 1988
Having been active in computer organization and architecture for many years, it is a pleas-
ure to write this foreword for the new edition of William Stallings’ comprehensive book on
this subject. In doing this, I found myself reflecting on the trends and changes in this subject
over the time that I have been involved in it. I myself became interested in computer archi-
tecture at a time of significant innovation and disruption. That disruption was brought about
not only through advances in technology but perhaps more significantly through access to
that technology. VLSI was here and VLSI design was available to students in the classroom.
These were exciting times. The ability to integrate a mainframe style computer on a single
silicon chip was a milestone, but that this was accomplished by an academic research team
made the achievement quite unique. This period was characterized by innovation and diver-
sity in computer architecture with one of the main trends being in the area of parallelism.
In the 1970s, I had hands-on experience of the Illiac IV, which was an early example of
explicit parallelism in computer architecture and which incidentally pioneered all semicon-
ductor memory. This interaction, and it certainly was that, kick-started my own interest in
computer architecture and organization, with particular emphasis on explicit parallelism in
computer architecture.
Throughout the 1980s and early 1990s research flourished in this field and there was a
great deal of innovation, much of which came to market through university start-ups. Iron-
ically however, it was the same technology that reversed this trend. Diversity was gradually
replaced with a near monoculture in computer systems with advances in just a few instruc-
tion set architectures. Moore’s law, a self-fulfilling prediction that became an industry guide-
line, meant that basic device speeds and integration densities both grew exponentially, with
the latter doubling every 18 months of so. The speed increase was the proverbial free lunch
for computer architects and the integration levels allowed more complexity and innovation
at the micro-architecture level. The free lunch of course did have a cost, that being the expo-
nential growth of capital investment required to fulfill Moore’s law, which once again limited
the access to state-of-the-art technologies. Moreover, most users found it easier to wait for
the next generation of mainstream processor than to invest in the innovations in parallel
computers, with their pitfalls and difficulties. The exceptions to this were the few large insti-
tutions requiring ultimate performance; two topical examples being large-scale scientific
simulation such as climate modeling and also in our security services for code breaking. For
13
14 Foreword
everyone else, the name of the game was compatibility and two instruction set architectures
that benefited from this were x86 and ARM, the latter in embedded systems and the former
in just about everything else. Parallelism was still there in the implementation of these ISAs,
it was just that it was implicit, harnessed by the architecture not in the instruction stream
that drives it.
Throughout the late 1990s and early 2000s, this approach to implicitly exploiting con-
currency in single-core computer systems flourished. However, in spite of the exponential
growth of logic density, it was the cost of the techniques exploited which brought this era to
a close. In superscalar processors, the logic costs do not grow linearly with issue width (par-
allelism), while some components grow as the square or even the cube of the issue width.
Although the exponential growth in logic could sustain this continued development, there
were two major pitfalls: it was increasingly difficult to expose concurrency implicitly from
imperative programs and hence efficiencies in the use of instruction issue slots decreased.
Perhaps more importantly, technology was experiencing a new barrier to performance
gains, namely that of power dissipation, and several superscalar developments were halted
because the silicon in them would have been too hot. These constraints have mandated the
exploitation of explicit parallelism, despite the compatibility challenges. So it seems that
again innovation and diversity are opening up this area to new research.
Perhaps not since the 1980s has it been so interesting to study in this field. That diver-
sity is an economic reality can be seen by the decrease in issue width (implicit parallelism)
and increase in the number of cores (explicit parallelism) in mainstream processors. How-
ever, the question is how to exploit this, both at the application and the system level. There
are significant challenges here still to be solved. Superscalar processors rely on the processor
to extract parallelism from a single instruction stream. What if we shifted the emphasis and
provided an instruction stream with maximum parallelism, how can we exploit this in dif-
ferent configurations and/or generations of processors that require different levels of expli-
cit parallelism? Is it possible therefore to have a micro-architecture that sequentializes and
schedules this maximum concurrency captured in the ISA to match the current configur-
ation of cores so that we gain the same compatibility in a world of explicit parallelism? Does
this require operating systems in silicon for efficiency?
These are just some of the questions facing us today. To answer these questions and
more requires a sound foundation in computer organization and architecture, and this book
by William Stallings provides a very timely and comprehensive foundation. It gives a com-
plete introduction to the basics required, tackling what can be quite complex topics with
apparent simplicity. Moreover, it deals with the more recent developments in this field,
where innovation has in the past, and is, currently taking place. Examples are in superscalar
issue and in explicitly parallel multicores. What is more, this latest edition includes two very
recent topics in the design and use of GPUs for general-purpose use and the latest trends in
cloud computing, both of which have become mainstream only recently. The book makes
good use of examples throughout to highlight the theoretical issues covered, and most of
these examples are drawn from developments in the two most widely used ISAs, namely the
x86 and ARM. To reiterate, this book is complete and is a pleasure to read and hopefully
will kick-start more young researchers down the same path that I have enjoyed over the last
40 years!
Preface
What’s New in the Tenth Edition
Since the ninth edition of this book was published, the field has seen continued innovations
and improvements. In this new edition, I try to capture these changes while maintaining a
broad and comprehensive coverage of the entire field. To begin this process of revision, the
ninth edition of this book was extensively reviewed by a number of professors who teach
the subject and by professionals working in the field. The result is that, in many places, the
narrative has been clarified and tightened, and illustrations have been improved.
Beyond these refinements to improve pedagogy and user-friendliness, there have been
substantive changes throughout the book. Roughly the same chapter organization has been
retained, but much of the material has been revised and new material has been added. The
most noteworthy changes are as follows:
■■ GPGPU [General-Purpose Computing on Graphics Processing Units (GPUs)]: One
of the most important new developments in recent years has been the broad adoption
of GPGPUs to work in coordination with traditional CPUs to handle a wide range of
applications involving large arrays of data. A new chapter is devoted to the topic of
GPGPUs.
■■ Heterogeneous multicore processors: The latest development in multicore architecture
tially revised and expanded to reflect the current state of embedded technology.
■■ Microcontrollers: In terms of numbers, almost all computers now in use are embedded
revised, expanded, and reorganized for a clearer and more thorough treatment.
Chapter 2 is devoted to this topic, and the issue of system performance arises through-
out the book.
15
16 Preface
■■ Flash memory: The coverage of flash memory has been updated and expanded, and now
includes a discussion of the technology and organization of flash memory for internal
memory (Chapter 5) and external memory (Chapter 6).
■■ Nonvolatile RAM: New to this edition is treatment of three important new nonvolatile
solid-state RAM technologies that occupy different positions in the memory hierarchy:
STT-RAM, PCRAM, and ReRAM.
■■ Direct cache access (DCA): To meet the protocol processing demands for very high
speed network connections, Intel and other manufacturers have developed DCA tech-
nologies that provide much greater throughput than traditional direct memory access
(DMA) approaches. New to this edition, Chapter 7 explores DCA in some detail.
■■ Intel Core Microarchitecture: As in the previous edition, the Intel x86 family is used as
a major example system throughout. The treatment has been updated to reflect newer
Intel systems, especially the Intel Core Microarchitecture, which is used on both PC and
server products.
■■ Homework problems: The number of supplemental homework problems, with solu-
Table P.1 Coverage of CS2013 Architecture and Organization (AR) Knowledge Area
IAS Knowledge Units Topics Textbook Coverage
Digital Logic and Digital ●● Overview and history of computer architecture —Chapter 1
Systems (Tier 2) ●● Combinational vs. sequential logic/Field program- —Chapter 11
mable gate arrays as a fundamental combinational
sequential logic building block
●● Multiple representations/layers of interpretation
(hardware is just another layer)
●● Physical constraints (gate delays, fan-in, fan-out,
energy/power)
Machine Level Represen- ●● Bits, bytes, and words —Chapter 9
tation of Data (Tier 2) ●● Numeric data representation and number bases —Chapter 10
●● Fixed-and floating-point systems
●● Signed and twos-complement representations
●● Representation of non-numeric data (character
codes, graphical data)
Preface 17
Objectives
This book is about the structure and function of computers. Its purpose is to present, as clearly
and completely as possible, the nature and characteristics of modern-day computer systems.
This task is challenging for several reasons. First, there is a tremendous variety of prod-
ucts that can rightly claim the name of computer, from single-chip microprocessors costing
a few dollars to supercomputers costing tens of millions of dollars. Variety is exhibited not
only in cost but also in size, performance, and application. Second, the rapid pace of change
that has always characterized computer technology continues with no letup. These changes
cover all aspects of computer technology, from the underlying integrated circuit technology
used to construct computer components to the increasing use of parallel organization con-
cepts in combining those components.
In spite of the variety and pace of change in the computer field, certain fundamental
concepts apply consistently throughout. The application of these concepts depends on the
current state of the technology and the price/performance objectives of the designer. The
intent of this book is to provide a thorough discussion of the fundamentals of computer
organization and architecture and to relate these to contemporary design issues.
The subtitle suggests the theme and the approach taken in this book. It has always
been important to design computer systems to achieve high performance, but never has
this requirement been stronger or more difficult to satisfy than today. All of the basic per-
formance characteristics of computer systems, including processor speed, memory speed,
memory capacity, and interconnection data rates, are increasing rapidly. Moreover, they are
increasing at different rates. This makes it difficult to design a balanced system that maxi-
mizes the performance and utilization of all elements. Thus, computer design increasingly
becomes a game of changing the structure or function in one area to compensate for a per-
formance mismatch in another area. We will see this game played out in numerous design
decisions throughout the book.
A computer system, like any system, consists of an interrelated set of components.
The system is best characterized in terms of structure—the way in which components are
interconnected, and function—the operation of the individual components. Furthermore, a
computer’s organization is hierarchical. Each major component can be further described by
decomposing it into its major subcomponents and describing their structure and function.
For clarity and ease of understanding, this hierarchical organization is described in this book
from the top down:
■■ Computer system: Major components are processor, memory, I/O.
■■ Processor: Major components are control unit, registers, ALU, and instruction execu-
tion unit.
■■ Control unit: Provides control signals for the operation and coordination of all proces-
Throughout the discussion, aspects of the system are viewed from the points of view of
both architecture (those attributes of a system visible to a machine language programmer) and
organization (the operational units and their interconnections that realize the architecture).
Example Systems
This text is intended to acquaint the reader with the design principles and implementation
issues of contemporary operating systems. Accordingly, a purely conceptual or theoretical
treatment would be inadequate. To illustrate the concepts and to tie them to real-world design
choices that must be made, two processor families have been chosen as running examples:
■■ Intel x86 architecture: The x86 architecture is the most widely used for nonembedded com-
puter systems. The x86 is essentially a complex instruction set computer (CISC) with some
RISC features. Recent members of the x86 family make use of superscalar and multicore
design principles. The evolution of features in the x86 architecture provides a unique case-
study of the evolution of most of the design principles in computer architecture.
■■ ARM: The ARM architecture is arguably the most widely used embedded processor,
used in cell phones, iPods, remote sensor equipment, and many other devices. The ARM
is essentially a reduced instruction set computer (RISC). Recent members of the ARM
family make use of superscalar and multicore design principles.
Many, but by no means all, of the examples in this book are drawn from these two computer
families. Numerous other systems, both contemporary and historical, provide examples of
important computer architecture design features.
The book includes a number of pedagogic features, including the use of interactive sim-
ulations and numerous figures and tables to clarify the discussion. Each chapter includes a list
of key words, review questions, homework problems, and suggestions for further reading. The
book also includes an extensive glossary, a list of frequently used acronyms, and a bibliography.
■■ PowerPoint slides: A set of slides covering all chapters, suitable for use in lecturing.
■■ PDF files: Copies of all figures and tables from the book.
■■ Sample syllabuses: The text contains more material than can be conveniently covered
in one semester. Accordingly, instructors are provided with several sample syllabuses
that guide the use of the text within limited time. These samples are based on real-world
experience by professors with the first edition.
The Companion Web site, at www.pearsonglobaleditions.com/stallings (click on
Instructor Resources link) includes the following:
■■ Links to Web sites for other courses being taught using this book.
■■ Sign-up information for an Internet mailing list for instructors using this book to
exchange information, suggestions, and questions with each other and with the author.
Student Resources
For this new edition, a tremendous amount of original supporting material for
students has been made available online, at two Web locations. The Companion
Web Site, at www.pearsonglobaleditions.com/stallings (click on Student
Resources link), includes a list of relevant links organized by chapter and an
errata sheet for the book.
Purchasing this textbook new grants the reader six months of access to the Premium
Content Site, which includes the following materials:
■■ Online chapters: To limit the size and cost of the book, two chapters of the book are
provided in PDF format. The chapters are listed in this book’s table of contents.
■■ Online appendices: There are numerous interesting topics that support material found
in the text but whose inclusion is not warranted in the printed text. A total of 13 appen-
dices cover these topics for the interested student. The appendices are listed in this
book’s table of contents.
■■ Homework problems and solutions: To aid the student in understanding the material, a
separate set of homework problems with solutions are available. Students can enhance
their understanding of the material by working out the solutions to these problems and
then checking their answers.
Preface 21
To access the Premium Content site, click on the Premium Content link
at the Companion Web site or at www.pearsonglobaleditions.com/stallings and
enter the student access code found on the card in the front of the book.
Finally, I maintain the Computer Science Student Resource Site at
WilliamStallings.com/StudentSupport.html.
chapter, that can be assigned for the student to read and then write a short report.
■■ Writing assignments: A list of writing assignments to facilitate learning the material.
■■ Test bank: Includes T/F, multiple choice, and fill-in-the-blank questions and answers.
This diverse set of projects and other student exercises enables the instructor to use
the book as one component in a rich and varied learning experience and to tailor a course
plan to meet the specific needs of the instructor and students. See Appendix A in this book
for details.
Interactive Simulations
An important feature in this edition is the incorporation of interactive simulations. These
simulations provide a powerful tool for understanding the complex design features of a
modern computer system. A total of 20 interactive simulations are used to illustrate key
functions and algorithms in computer organization and architecture design. At the relevant
point in the book, an icon indicates that a relevant interactive simulation is available online
for student use. Because the animations enable the user to set initial conditions, they can
22 Preface
serve as the basis for student assignments. The instructor’s supplement includes a set of
assignments, one for each of the animations. Each assignment includes several specific prob-
lems that can be assigned to students.
For access to the animations, click on the rotating globe at this book’s Web site at
www.pearsonglobaleditions.com/stallings.
Acknowledgments
This new edition has benefited from review by a number of people, who gave generously
of their time and expertise. The following professors and instructors reviewed all or a large
part of the manuscript: Molisa Derk (Dickinson State University), Yaohang Li (Old Domin-
ion University), Dwayne Ockel (Regis University), Nelson Luiz Passos (Midwestern State
University), Mohammad Abdus Salam (Southern University), and Vladimir Zwass (Fair-
leigh Dickinson University).
Thanks also to the many people who provided detailed technical reviews of one or
more chapters: Rekai Gonzalez Alberquilla, Allen Baum, Jalil Boukhobza, Dmitry Bufistov,
Humberto Calderón, Jesus Carretero, Ashkan Eghbal, Peter Glaskowsky, Ram Huggahalli,
Chris Jesshope, Athanasios Kakarountas, Isil Oz, Mitchell Poplingher, Roger Shepherd,
Jigar Savla, Karl Stevens, Siri Uppalapati, Dr. Sriram Vajapeyam, Kugan Vivekanandara-
jah, Pooria M. Yaghini, and Peter Zeno,
Peter Zeno also contributed Chapter 19 on GPGPUs.
Professor Cindy Norris of Appalachian State University, Professor Bin Mu of the Uni-
versity of New Brunswick, and Professor Kenrick Mock of the University of Alaska kindly
supplied homework problems.
Aswin Sreedhar of the University of Massachusetts developed the interactive simula-
tion assignments and also wrote the test bank.
Professor Miguel Angel Vega Rodriguez, Professor Dr. Juan Manuel Sánchez Pérez,
and Professor Dr. Juan Antonio Gómez Pulido, all of University of Extremadura, Spain,
prepared the SMPCache problems in the instructor’s manual and authored the SMPCache
User’s Guide.
Todd Bezenek of the University of Wisconsin and James Stine of Lehigh University
prepared the SimpleScalar problems in the instructor’s manual, and Todd also authored the
SimpleScalar User’s Guide.
Finally, I would like to thank the many people responsible for the publication of the
book, all of whom did their usual excellent job. This includes the staff at Pearson, par-
ticularly my editor Tracy Johnson, her assistant Kelsey Loanes, program manager Carole
Snyder, and production manager Bob Engelhardt. I also thank Mahalatchoumy Saravanan
and the production staff at Jouve India for another excellent and rapid job. Thanks also to
the marketing and sales staffs at Pearson, without whose efforts this book would not be in
front of you.
Pearson would like to thank and acknowledge Mohit Tahiliani, NITK Surathkal, for
contributing to the Global Edition, and Arup Kumar Bhattacharjee, RCC Institute of Infor-
mation Technology, Soumen Mukherjee, RCC Institute of Information Technology, Chetan
Venkatesh, MS Ramaiah Institute of Technology, and Chitra Dhawale, P.R. Pote College of
Engineering and Management, for reviewing the Global Edition.
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glad would my soul be to help you to love Him! But amongst us all,
we could not love Him enough. He is the Son of the Father's love,
and God's delight; the Father's love lieth all upon Him. Oh, if all
mankind would fetch all their love and lay it upon Him! Invite Him,
and take Him home to your houses, in the exercise of prayer
morning and evening, as I often desired you; especially now, let Him
not want lodging in your houses, nor lie in the fields, when He is
shut out of pulpits and kirks. If ye will be content to take heaven by
violence and the wind on your face for Christ and His cross, I am
here one who hath some trial of Christ's cross, and I can say, that
Christ was ever kind to me, but He overcometh Himself (if I may
speak so) in kindness while I suffer for Him. I give you my word for
it, Christ's cross is not so evil as they call it; it is sweet, light, and
comfortable. I would not want the visitations of love, and the very
breathings of Christ's mouth when He kisseth, and my Lord's
delightsome smiles and love-embracements under my sufferings for
Him, for a mountain of gold, or for all the honours, court, and
grandeur of velvet kirkmen.[341] Christ hath the yoke and heart of my
love. "I am my Beloved's, and my Well-beloved is mine."
Oh that ye were all hand-fasted to Christ! O my dearly-beloved in
the Lord, I would I could change my voice, and had a tongue tuned
by the hands of my Lord, and had the art of speaking of Christ, that
I might point out to you the worth, and highness, and greatness,
and excellency of that fairest and renowned Bridegroom! I beseech
you by the mercies of the Lord, by the sighs, tears, and heart's-
blood of our Lord Jesus, by the salvation of your poor and precious
souls, set up the mountain, that ye and I may meet before the
Lamb's throne amongst the congregation of the first-born. Lord
grant that that may be the trysting-place! that ye and I may put up
our hands together, and pluck and eat the apples off the tree of life,
and that we may feast together, and drink together of that pure river
of the water of life, that cometh out from the throne of God and of
the Lamb. Oh, how little is your hand-breadth and span-length of
days here! Your inch of time is less than when ye and I parted.
Eternity, eternity is coming, posting on with wings; then shall every
man's blacks and whites be brought to light. Oh, how low will your
thoughts be of this fair-skinned but heart-rotten apple, the vain,
vain, feckless world, when the worms shall make them houses in
your eye-holes, and shall eat off the flesh from the balls of your
cheeks, and shall make that body a number of dry bones! Think not
that the common gate of serving God, as neighbours and others do,
will bring you to heaven. Few, few are saved. The devil's court is
thick and many; he hath the greatest number of mankind for his
vassals. I know this world is a forest of thorns in your way to
heaven; but you must go through it. Acquaint yourselves with the
Lord: hold fast Christ; hear His voice only. Bless His name; sanctify
and keep holy His day; keep the new commandment, "Love one
another;" let the Holy Spirit dwell in your bodies; and be clean and
holy. Love not the world: lie not, love and follow truth: learn to know
God. Keep in mind what I taught you; for God will seek an account
of it, when I am far from you. Abstain from all evil, and all
appearance of evil: follow good carefully, and seek peace and follow
after it: honour your king, and pray for him. Remember me to God in
your prayers; I dow not forget you. I told you often while I was with
you, and now I write it again, heavy, sad, and sore is that stroke of
the Lord's wrath that is coming upon Scotland. Wo, wo, wo to this
harlot-land! for they shall take the cup of God's wrath from His
hands, and drink, and spue, and fall, and not rise again. In, in, in
with speed to your stronghold, ye prisoners of hope, and hide you
there whill the anger of the Lord pass! Follow not the pastors of this
land, for the sun is gone down upon them. As the Lord liveth, they
lead you from Christ, and from the good old way. Yet the Lord will
keep the holy city, and make this withered kirk to bud again like a
rose, and a field blessed of the Lord.
The grace of the Lord Jesus Christ be with you all. The prayers and
blessings of a prisoner of Christ, in bonds for Him, and for you, be
with you all. Amen.
Your lawful and loving pastor,
S. R.
Aberdeen, July 13, 1637.
CCXXVI.—To the Lady Kilconquhar.
[Lady Kilconquhar, whose maiden name was Helen Murray, being
the third daughter of Sir Archibald Murray of Blackbarony, was
the wife of Sir John Carstairs of Kilconquhar, in the county of
Fife. Her mother, Margaret Maule, was of the family of Panmure.
Their youngest daughter, Bethia, in 1656, married Thomas Rigg
of Athernie. The house of Kilconquhar (called Kinneucher by the
people) is near the loch and the village, with Elie not far off on
one side, and Balcarras on the other. The loch with its swans,
the woods, and the sea so near, make it a pleasant spot.]
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